The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Electronic devices use integrated circuits including memory to store data. One type of memory that is commonly used in electronic devices is dynamic random-access memory (DRAM). DRAM stores each bit of data in a separate capacitor within the integrated circuit. The capacitor can be either charged or discharged, which represents the two values of a bit. Since non-conducting transistors leak, the capacitors will slowly discharge, and the information eventually fades unless the capacitor charge is refreshed periodically.
Each DRAM cell includes a transistor and a capacitor as compared to four or six transistors in static RAM (SRAM). This allows DRAM to reach very high storage densities. Unlike flash memory, DRAM is volatile memory (vs. non-volatile memory), since data is lost when power is removed.
Several emerging memory devices are potential replacements for DRAM. For example, DRAM replacements include non-volatile RAM (NVRAM) devices such as resistive RAM (RRAM or ReRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FRAM or FeRAM), spin-transfer torque RAM (STT-RAM), and phase-change RAM (PC-RAM).
In FIG. 1, an example of a portion of an MRAM stack 10 is shown. The MRAM stack 10 includes a substrate 14, an oxide layer 18, a bottom electrode 22, a fixed magnetic layer 26, a magnetic tunnel junction (MTJ) layer 30, a free magnetic layer 32, and a top electrode 34.
Spin-transfer torque involves changing the orientation of a magnetic layer in the MTJ layer 30 using a spin-polarized current. Charge carriers (such as electrons) have a property known as spin, which is a small quantity of angular momentum intrinsic to the carrier. Current is generally un-polarized. A spin polarized current is one with more electrons of either spin. By passing current through a thick magnetic layer (the fixed magnetic layer 26), a spin-polarized current can be produced. If the spin-polarized current is directed into the free magnetic layer 32, angular momentum can be transferred to change the orientation of the free magnetic layer 32.
In memory applications, when the spin of the free magnetic layer 32 is the same as the fixed magnetic layer 26, the memory cell has a low resistive state. When the spin of the free magnetic layer 32 is different than the fixed magnetic layer 26, the memory cell has a high resistive state.
Patterning an STT-RAM stack typically includes depositing ferromagnetic layers and then using reactive ion etching (RIE) to obtain the desired geometry. In some examples, the ferromagnetic layers may be deposited using physical vapor deposition (PVD). The RIE tends to cause unavoidable damage to the ferromagnetic layers and metal oxide layers, which reduces memory cell performance. The resulting etched STT-RAM stack also lacks a sufficiently sharp profile.
One process alternative to RIE involves selective electroless deposition. Some electroless deposition of Co and Fe based alloys use hypophosphites as a reducing agent. This approach, however, requires process temperatures of 75-90° C., which may damage spin states in the thin ferromagnetic films.
Electroless deposition processes using borohydride or dimethylamine borane to deposit CoFeB require high process temperatures. Additionally, in the electroless deposition processes using hypophosphite or boranes, Co and Fe concentrations cannot be modulated independent from the concentration of boron (B) or phosphorus (P). As a result, deposition of Fe-rich CoxFe1-x film is not possible without a correspondingly high concentration of B or P. Furthermore, the high deposition rate of the reducing agents makes it difficult to control thicknesses less than 10 nm.